General • Re: How many GPIO interrupts?

There are enable, status, and force registers for three interrupt destinations: proc 0, proc 1, and dormant_wake. For proc0 the registers are enable (PROC0_INTE0), status (PROC0_INTS0), and force (PROC0_INTF0). Dormant wake is used to wake the ROSC or XOSC up from dormant mode. See Section 2.11.5.2 for more information on dormant mode.

All interrupts are ORed together per-bank per-destination resulting in a total of six GPIO interrupts:

Bank 0 - GPIO 0-29
• IO bank 0 to dormant wake
• IO bank 0 to proc 0 <<Core 0 GPIO 0-29
• IO bank 0 to proc 1 <<Core 1 GPIO 0-29

Bank 1 - QSPI

2 banks x 3 destinations = 6
• IO QSPI to dormant wake
• IO QSPI to proc 0 <<Core 0 QSPI
• IO QSPI to proc 1 <<Core 1 QSPI

Statistics: Posted by gmx — Sat Oct 19, 2024 12:24 am